october 2005 ? 2005 fairchild semiconductor corporation FDMW2512NZ rev d FDMW2512NZ monolithic common drain n-channe l 2.5v specified powertrench ? mosfet general description this dual n-channel mosfet has been designed using fairchild semiconductor?s advanced power trench process to optimize the r ds(on) @ v gs = 2.5v on special microfet lead frame with all the drains on one side of the package. applications ? li-ion battery pack features ? 7.2 a, 20 v r ds(on) = 26 m ? @ v gs = 4.5 v r ds(on) = 34 m ? @ v gs = 2.5 v ? esd protection diode(note 3) ? low profile ? 0.8 mm maximum ? in the new package microfet 2 x 5 mm 3 2 1 4 5 6 bottom drain contact bottom drain contact q1 q2 absolute maximum ratings t a =25 o c unless otherwise noted symbol parameter ratings units v dss drain-source voltage 20 v v gss gate-source voltage 12 v i d drain current ? continuous (note 1a) 7.2 a ? pulsed 28 p d power dissipation (steady state) (note 1a) 2.2 w (note 1b) 0.8 t j , t stg operating and storage junction temperature range ?55 to +150 c thermal characteristics r ja thermal resistance, junction-to-ambient (note 1a) 55 c/w r ja thermal resistance, junction-to-ambient (note 1b) 145 package marking and ordering information device marking device reel size tape width quantity 2512z FDMW2512NZ 13?? 12mm 3000 units FDMW2512NZ pin 1 g2 s2 s2 g1 s1 s1 s1 s1 g1 s2 s2 g2 mlp 2x5
FDMW2512NZ rev d electrical characteristics t a = 25c unless otherwise noted symbol parameter test conditions min typ max units off characteristics bv dss drain?source breakdown voltage v gs = 0 v, i d = 250 a 20 v ? bv dss ? t j breakdown voltage temperature coefficient i d = 250 a, referenced to 25 c 12 mv/ c i dss zero gate voltage drain current v ds = 16 v, v gs = 0 v 1 a i gss gate?body leakage, v gs = 12 v, v ds = 0 v 10 a on characteristics (note 2) v gs(th) gate threshold voltage v ds = v gs , i d = 250 a 0.5 0.8 1.5 v ? v gs(th) ? t j gate threshold voltage temperature coefficient i d = 250 a, referenced to 25 c ?3 mv/ c r ds(on) static drain?source on?resistance v gs = 4.5 v, i d = 7.2 a v gs = 4.0 v, i d = 7.2 a v gs = 3.1 v, i d = 6.4 a v gs = 2.5 v, i d = 6.4 a v gs = 4.5 v, i d = 7.2 a, t j =125 c 19 20 22 23 25 26 28 32 34 39 m ? g fs forward transconductance v ds = 5 v, i d =7.2 a 30 s dynamic characteristics c iss input capacitance 740 pf c oss output capacitance 165 pf c rss reverse transfer capacitance v ds = 15 v, v gs = 0 v, f = 1.0 mhz 127 pf r g gate resistance f = 1.0 mhz 1.4 ? switching characteristics (note 2) t d(on) turn?on delay time 8 16 ns t r turn?on rise time 10 20 ns t d(off) turn?off delay time 16 29 ns t f turn?off fall time v dd = 10 v, i d = 1 a, v gs = 4.5 v, r gen = 6 ? 13 23 ns q g total gate charge 9 13 nc q gs gate?source charge 1 nc q gd gate?drain charge v ds = 10 v, i d = 7.2 a, v gs = 4.5 v 3 nc drain?source diode characteristics v sd drain?source diode forward voltage v gs = 0 v, i s = 1.8 a (note 2) 0.7 1.2 v t rr diode reverse recovery time 15 ns q rr diode reverse recovery charge i f = 7.2 a, di f /dt = 100 a/s 4 nc notes: 1. r ja is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the so lder mounting surface of the drain pins. r jc is guaranteed by design while r ca is determined by the user's board design. a) 55c/w when mounted on a 1in 2 pad of 2 oz copper b) 145c/w when mounted on a minimum pad of 2 oz copper scale 1 : 1 on letter size paper 2 . pulse test: pulse width < 300 s, duty cycle < 2.0% 3. the diode connected between the gate and source serves only as protection againts esd. no gate overvoltage rating is implied. FDMW2512NZ
FDMW2512NZ rev d typical characteristics 0 5 10 15 20 25 30 35 40 45 50 01234 v ds , drain-source voltage (v) i d , drain current (a) 2.5v 2.0v v gs = 4.5v 3.0v 3.5v 1.8v 0.8 1 1.2 1.4 1.6 1.8 2 2.2 2.4 0 5 10 15 20 25 30 i d , drain current (a) r ds(on) , normalized drain-source on-resistance v gs = 1.8v 2.5v 4.5v 3.1v 2.0v 4.0v figure 1. on-region characteristics. fi gure 2. on-resistance variation with drain current and gate voltage. 0.6 0.8 1 1.2 1.4 1.6 -50 -25 0 25 50 75 100 125 150 t j , junction temperature ( o c) r ds(on) , normalized drain-source on-resistance i d = 7.2a v gs = 4.5v 0.01 0.018 0.026 0.034 0.042 0.05 0.058 0.066 0.074 12345 v gs , gate to source voltage (v) r ds(on) , on-resistance (ohm) i d = 3.6a t a = 125 o c t a = 25 o c figure 3. on-resistance variation with temperature. figure 4. on-resistance variation with gate-to-source voltage. 0 5 10 15 20 25 30 0.511.522.53 v gs , gate to source voltage (v) i d , drain current (a) t a = -55 o c 25 o c 125 o c v ds = 5v 0.0001 0.001 0.01 0.1 1 10 100 0 0.2 0.4 0.6 0.8 1 1.2 v sd , body diode forward voltage (v) i s , reverse drain current (a) t a = 125 o c 25 o c -55 o c v gs = 0v figure 5. transfer characteristics. figure 6. body diode forward voltage variation with source current and temperature. FDMW2512NZ
FDMW2512NZ rev d typical characteristics 0 1 2 3 4 5 024681012 q g , gate charge (nc) v gs , gate-source voltage (v) i d = 7.2a v ds = 5v 15v 10v 0 200 400 600 800 1000 1200 0 4 8 12 16 20 v ds , drain to source voltage (v) capacitance (pf) c iss c rss c oss f = 1mhz v gs = 0 v figure 7. gate charge characteristics. figure 8. capacitance characteristics. 0.01 0.1 1 10 100 0.1 1 10 100 v ds , drain-source voltage (v) i d , drain current (a) dc 10s 1s 100ms r ds(on) limit v gs = 4.5v single pulse r ja = 145 o c/w t a = 25 o c 10ms 1ms 100us 0 10 20 30 40 50 0.001 0.01 0.1 1 10 100 1000 t 1 , time (sec) p(pk), peak transient power (w) single pulse r ja = 145c/w t a = 25c figure 9. maximum safe operating ar ea. figure 10. single pulse maximum power dissipation. 0.01 0.1 1 0.0001 0.001 0.01 0.1 1 10 100 1000 t 1 , time (sec) r(t), normalized effective transient thermal resistance r ja (t) = r(t) * r ja r ja =145 c/w t j - t a = p * r ja (t) duty cycle, d = t 1 / t 2 p (p k ) t 1 t 2 single pulse 0.01 0.02 0.05 0.1 0.2 d = 0.5 figure 11. transient thermal response curve. thermal characterization perf ormed using the conditions described in note 1b. transient thermal response will change depending on the circuit board design. FDMW2512NZ
FDMW2512NZ rev d dimensional outline and pad layout FDMW2512NZ
disclaimer fairchild semiconductor reserves the right to make changes without further notice to any products herein to improve reliability, function or design. fairchild does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. trademarks the following are registered and unregistered trademarks fairchild semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. life support policy fairchild?s products are not authorized for use as critical components in life support devices or systems without the express written approval of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. a critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. product status definitions definition of terms datasheet identification product status definition advance information preliminary no identification needed obsolete this datasheet contains the design specifications for product development. specifications may change in any manner without notice. this datasheet contains preliminary data, and supplementary data will be published at a later date. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. this datasheet contains final specifications. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. this datasheet contains specifications on a product that has been discontinued by fairchild semiconductor. the datasheet is printed for reference information only. formative or in design first production full production not in production isoplanar? littlefet? microcoupler? microfet? micropak? microwire? msx? msxpro? ocx? ocxpro? optologic ? optoplanar? pacman? pop? power247? poweredge? fast ? fastr? fps? frfet? globaloptoisolator? gto? hisec? i 2 c? i-lo ? implieddisconnect? intellimax? rev. i17 acex? activearray? bottomless? build it now? coolfet? crossvolt ? dome? ecospark? e 2 cmos? ensigna? fact? fact quiet series? powersaver? powertrench ? qfet ? qs? qt optoelectronics? quiet series? rapidconfigure? rapidconnect? serdes? scalarpump? silent switcher ? smart start? spm? stealth? superfet? supersot?-3 supersot?-6 supersot?-8 syncfet? tinylogic ? tinyopto? trutranslation? uhc? ultrafet ? unifet? vcx? wire? across the board. around the world.? the power franchise ? programmable active droop?
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